Five new Apple patents have appeared at the US Patent & Trademark Office. Following is a summary of each.
Patent number 7,834,662 is for a level shifter with embedded logic and low minimum voltage. In one embodiment, a level shifter circuit may include a shift stage that also embeds transistors that implement a logic operation on two or more inputs to the level shifter. At least one of the inputs may be sourced from circuitry that is powered by a different power supply than the level shifter and circuitry that receives the level shifter output. Additionally, the level shifter includes one or more dummy transistors that match transistors the perform the logic operation, to improve symmetry of the level shifter circuit. In some embodiments, certain design and layout rules may be applied to the level shifter circuit to limit variation in the symmetry over various manufacturing variations. The inventors are Brian J. Campbell, Vincent R. von Kaenel, Naveen Javarappa, and Greg M. Hess.
Patent number 7,834,882 involves virtualization of graphics resources. Per the patent, graphics resources are virtualized through an interface between graphics hardware and graphics clients. The interface allocates the graphics resources across multiple graphics clients, processes commands for access to the graphics resources from the graphics clients, and resolves conflicts for the graphics resources among the clients. The inventors are John Stauffer, Bob Beretta and Ken Dyke.
Patent number 7,836,324 is for an oversampling-based scheme for synchronous interface communication. In one embodiment, an apparatus to synchronously communicate on an interface that has an associated interface clock for a circuit that has an internal clock used internal to the circuit comprises a control circuit coupled to receive the internal clock and the interface clock. The control circuit is configured to sample the interface clock multiple times per clock cycle of the internal clock and to detect a phase difference, to a granularity of the samples, between the internal clock and the interface clock. The apparatus comprises a data path that is configured to transport data between an internal clock domain and an interface clock domain. The data path is configured to provide at least two different timings on the transported data relative to the internal clock. The control circuit is coupled to the data path and is configured to select one of the timings responsive to a detected phase difference. The inventors are Sridhar P. Subramanian, Sukalpa Biswas, Vincent R. von Kaenel and Priya Ananthanarayanan.
Patent number 7,836,372 is for a memory controller with a loopback test interface. In one embodiment, an apparatus comprises an interconnect; at least one processor coupled to the interconnect; and at least one memory controller coupled to the interconnect. The memory controller is programmable by the processor into a loopback test mode of operation and, in the loopback test mode, the memory controller is configured to receive a first write operation from the processor over the interconnect. The memory controller is configured to route write data from the first write operation through a plurality of drivers and receivers connected to a plurality of data pins that are capable of connection to one or more memory modules. The memory controller is further configured to return the write data as read data on the interconnect for a first read operation received from the processor on the interconnect. The inventors are Luka Bodrozic, Sukalpa Biswas, Hao Chen, Sridhar P. Subramanian, and James B. Keller.
Patent number 7,836,408 involves methods and an apparatus for displaying relative emphasis in a file. Methods and apparatus for providing a scroll bar including a plurality of locations corresponding to a plurality of locations in a file are disclosed. One or more location criteria that are obtained are used to identify one or more desired locations in the file. One or more display criteria to be applied to designate the one or more desired locations are identified. In addition, one or more desired locations in the file are located according to the location criteria. The scroll bar is then displayed by applying the display criteria to one or more locations of the scroll bar corresponding to the desired locations in the file. The inventors are Ian R. Ollman, Nathan T. Slingerland and Sanjay K. Patel.