During the International Supercomputing Conference (ISC), Intel (http://www.intel.com) announced plans to deliver new products based on the Intel Many Integrated Core (MIC) architecture that will purportedly create platforms running at trillions of calculations per second, while also retaining the benefits of standard Intel processors.
Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel’s 22-nanometer manufacturing (nm) process — using transistor structures as small as 22 billionths of a meter — and will use Moore’s Law to scale to more than 50 Intel processing cores on a single chip. While the vast majority of workloads will still run best on Intel Xeon processors, Intel MIC architecture will help accelerate select highly parallel applications, according to Kirk Skaugen, vice president and general manager of Intel’s Data Center Group.
Industry design and development kits codenamed “Knights Ferry” are currently shipping to select developers, and beginning in the second half of 2010, Intel will expand the program to deliver an extensive range of developer tools for Intel MIC architecture. Common Intel software tools and optimization techniques between Intel MIC architecture and Intel Xeon processors will support diverse programming models that will place unprecedented performance in the hands of scientists, researchers and engineers, allowing them to increase their pace of discovery and preserve their existing software investments, Skaugen says.
The Intel MIC architecture is derived from several Intel projects, including “Larrabee” and such Intel Labs research projects as the Single-chip Cloud Computer.