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Serial Port Access
Volume Number:2
Issue Number:1
Column Tag:The Electrical Mac

Direct Serial Port Access

By Jeff Mitchell, President, Digital Solutions, Inc., MacTutor Contributing Editor

The serial ports continue to be a popular form of frustration for many of us. If you are tired of deciphering Inside Macintosh and would just like to talk directly to the serial ports, stay tuned. I'm going to describe some of the inner workings of the SCC and let you know where to write to get the technical manual, which will tell you the rest. I'm also including complete pinouts of all the Mac's connectors and a couple of cable pinouts.

PORT PINOUTS

SERIAL CONNECTORS

Pin # Name Description

1 CGND Chassis ground

2 +5V 5 Volt output

3 CGND Chassis ground

4 TxD+ Transmit data - noninverted

5 TxD- Transmit data - inverted

6 +12V 12 Volt output

7 HSK Handshake: CTS or TRxC depending on SCC mode

8 RxD+ Receive data - noninverted

9 RxD- Receive data - inverted

MOUSE CONNECTOR

Pin # Name Description

1 CGND Chassis ground

2 +5V 5 Volt output

3 CGND Chassis ground

4 X2 Horizontal movement line (connected to VIA PB4)

5 X1 Horizontal movement line (connected to SCC DCDA)

6 N/C Not connected

7 SW Mouse button (connected to VIA PB3)

8 Y2 Vertical movement line (connected to VIA PB5)

9 Y1 Vertical movement line (connected to SCC DCDB)

KEYBOARD CONNECTOR

Pin # Name Description

1 CGND Chassis ground

2 KBD1 Keyboard clock

3 KBD2 Keyboard data

4 +5V 5 Volt output

EXTERNAL DRIVE CONNECTOR

Pin # Name Description

1 CGND Chassis ground

2 CGND Chassis ground

3 CGND Chassis ground

4 CGND Chassis ground

5 -12V Minus 12 Volt output

6 +5V 5 Volt output

7 +12V 12 Volt output

8 +12V 12 Volt output

9 N/C Not connected

10 PWM Regulates the speed of the drive

11 PH0 Control line to send commands to the drive

12 PH1 Control line to send commands to the drive

13 PH2 Control line to send commands to the drive

14 PH3 Control line to send commands to the drive

15 WrReq Turns on the ability to write data to the drive

16 HdSel Control line to send commands to the drive

17 Enbl2 Enables the Rd line (otherwise Rd is

high-impedence)

18 Rd Data read from the drive

19 Wr Data written to the drive

CABLE PINOUTS

IMAGEWRITER CABLE

Mac pin # Name IW pin # Description

1 CGND 1 Chassis ground

3 GND 7 Pins 3 & 8 connected on Mac side

5 TxD-, RD 3 Receive data

7 HSK, DTR 20 Printer ready line

8 RxD+, GND Not connected on IW side

9 RxD-, SD 2 Send data

EXTERNAL DRIVE CABLE

Mac pin # Name Drive pin # Description

1 CGND 1 Chassis ground

2 CGND 3 Chassis ground

3 CGND 5 Chassis ground

4 CGND 7 Chassis ground

6 +5V 11

7 +12V 13

8 +12V 15

10 PWM 20

11 PH0 2

12 PH1 4

13 PH2 6

14 PH3 8

15 WrReq 10

16 HdSel 12

17 Enbl2 14

18 Rd 16

19 Wr 18

Direct serial communications

The Z8530 SCC is the chip which performs all of the Mac's serial communication functions, including the lowest level of the AppleTalk protocol. If you just want to hack out a quick program using the serial ports and don't want to bother with the serial driver, I'll show you how to disable interrupts (so the operating system doesn't interfere with you), set the transmission parameters, and send and receive data.

The SCC is an extremely complex device, so if you want to do really serious programming, you need the technical manual. It is available from Zilog for $6.00 at the following address:

Zilog, Inc.

1315 Dell Ave.

Campbell, CA 95008

Attn: Publications

Ask for the Z8030/Z8530 SCC Serial Communications Controller Technical Manual, part number 00-2057-02.

In order to allow software written on the Mac to run on other machines, like the Lisa, hardware addresses should be referenced via a pointer located in low memory. For the SCC, there are two base address, one for read operations and one for write operations.

SCCRd   EQU    $1D8     SCC base read addr [pointer]
SCCWr   EQU $1DC   SCC base write addr [pointer]

Of course if we were concerned about portability we wouldn't write to the hardware directly anyway, so the absolute addresses are:

sccRBase  EQU    $9FFFF8    SCC base read address
sccWBase  EQU  $BFFFF9    SCC base write address

There is a data register and a control register that can be accessed for each serial channel, A and B. A is the modem port and B is the printer port. The offsets from the base addresses for the control and data registers are:

aData   EQU  6     offset for A channel data
aCtl      EQU  2     offset for A channel control
bData   EQU  4     offset for B channel data
bCtl      EQU  0     offset for B channel control

The registers are accessed by adding the offset to the appropriate base address, depending upon whether you want to read or write.

There are some limitations to how you can access the SCC. First, there is an 8530 timing parameter which must be observed called the recovery time, which is the minimum time between SCC operations. This time is 2.2 microseconds which means if you have a polling loop you may have to pad it.

The other limitations are specific to the Macintosh and are the result of the way the address decoding was implemented. Read operations must be byte reads of an even address and writes must be byte writes of an odd address. An odd byte read will reset the SCC and any word access will shift the phase of the Mac's high frequency timing.

Z8530 TECHNICAL DESCRIPTION

The operation of the SCC is controlled by 16 write-only registers and nine read-only registers. All registers are 8 bits wide, although some bits may not be used. Most of these registers are duplicated for each of the two channels, but some are shared by both.

I'm only going to describe the registers that will allow you to change the transmission parameters and send and receive data. Some of the registers may have functions in addition to the ones I describe, so you'll need the manual if you want to explore all the SCC's capabilities.

Write register 0 (abbreviated WR0) is the command register. There is a WR0 for each channel. The primary function of the command register is to act as a pointer to all the other registers.

To access any other register except the data registers, you first write the register number you want to access in the command register. The next read or write will be directed to that register. At the conclusion of this read or write cycle the pointer bits will be reset to zero, so the next write will be to WR0. The least significant 4 bits of the command register (D3 - D0) are used as the pointer bits. D7 - D4 must be zeros when writing to the pointer register.

Transmit and receive interrupts are enabled in WR1. To disable interrupts, write a $01 to this register. This disables transmit and receive interrupts but leaves external/status interrupts enabled. The external/status interrupt is used as a mouse input and if it is turned off, the mouse will freeze up.

WR3 controls some of the receive parameters. D7 and D6 set the number of bits per character. 00 = 8 bits, 01 = 7 bits, 10 = 6 bits, and 00 = 5 bits. D0 is the receiver enable. If D0 is set to 1 the receiver is enabled while a 0 in D0 disables it.

WR4 contains control bits for both the receiver and the transmitter. D7 and D6 control the internal clock prescaler which divides the incoming 3.6864 MHz clock. These are set to 01 for a divide by 16 ratio. D3 and D2 set the number of stop bits. 11 = 2 stop bits, 10 = 1.5 stop bits, and 01 = 1 stop bit. 00 is used when the chip is in synchronous mode. D0 enables parity generation/checking if set, and D1 determines whether parity will be even (D1 set) or odd (D1 clear). D1 is ignored if parity is not enabled.

WR5 is the counterpart of WR3 for the transmit parameters. D6 and D5 control the number of bits per character and operate identically to D7 and D6 of WR3 (i.e 00 = 8 bits, . . ). D3 enables the transmitter if set. D1 enables the RTS output line on the chip, which is tied to the enable input of the RS-422 driver. D1 must be set for the driver to operate.

WR8 is the transmit buffer register. Once the transmitter is configured data can be output by writing to control register 8, or by writing directly to the data register. Writing to the data register saves an extra write to the pointer register.

WR9 is the master interrupt control register. There is only one WR9 which can be accessed from either the A or B channel. D7 and D6 select chip reset commands. Writing a 11 will force a hardware reset of the chip. A 10 will reset channel A and a 01 will reset channel B. A 00 has no effect. D3 is the master interrupt enable bit. Clearing this bit will prevent the SCC from generating any interrupts. Once again, this will cause the mouse to freeze up .

WR11 is the clock mode control register which selects the source of the transmit and receive clocks. To use the internal baud rate generator set D6 and D4 high and all other bits low.

WR12 and WR13 are the time constants for the internal baud rate generator. The baud rate generator is a counter which is clocked by the input clock divided by the prescale value. In our case this is 3.6864 MHz divided by 16 (set in WR4) = 230.4 KHz.

Note that this is the AppleTalk data transfer rate. When used as an AppleTalk node the SCC operates in a synchronous mode and the baud rate generator is bypassed.

The baud rate time constant is a 16 bit value, determined by the following formula:

Time const. = (230400 / (2 * desired baud rate )) - 2

For 300 baud, the time constant would be (230400 / 600) - 2 = 382. This value must be split into upper and lower 8 bit values. The upper value goes in WR13 and is INT(382/256) = 1. The lower value goes in WR12 and is 382 - (256 * WR13) = 126. As the baud rate goes up, the time constant becomes smaller.

WR14 contains some miscellaneous control bits. Setting this register to a $01 enables the baud rate generator.

WR15 is the external/status interrupt control register. D3 must be set high to enable DCD interrupts which are used by the mouse. All other bits are set to zero.

That takes care of all the write registers, leaving the read registers which are also accessed indirectly through WR0. Read register 0 (RR0) is the receive and transmit buffer status register. D2 is the transmit buffer empty bit. When set, the transmit buffer is empty and another character may be output. D0 is the receive character available bit. When set it indicates that a character has been received and may be read from the receive buffer.

RR8 is the receive data register. Received data may either be read here or through the data register directly, saving the write to the command register.

RR12 and RR13 return the value of the baud rate time constant written to WR12 and WR13.

USING THE SCC

I haven't described all the functions of each register, and have even ignored some of the registers altogether. The technical manual is a must if you wish to use the chip's full capabilities.

I've included a couple of programs for experimenting with the SCC. The first one, SCCHack, lets you fool around with the registers individually. The second one, HackTerm, is a terminal program which directly accesses the serial chip. Both are written in Modula-2, which may not be your particular language of choice, but it makes very readable code.

Modula-2 was designed as a systems implementation language, which means that although it is a high level language, it has some low level constructs that can give the programmer direct access to the hardware. One of these constructs is the capability to anchor variables to absolute addresses, such as hardware locations. Modula Corp's implementation of Modula-2 limits these addresses to the lower 64K of the address space, however ($0000 - $FFFE). This particular implementation of Modula-2 also provides no direct mechanism for doing byte operations, which are required if we want to talk to the SCC.

To circumvent these limitations I've declared a variable type SerPtr which is a pointer to a character array. SCCRd and SCCWr are declared to be of type SerPtr and anchored to the pointers located at $1D8 and $1DC. I then use SCCRd and SCCWr as pointers to index directly into the character array at the desired offset. Using a character array ensures that I do only byte accesses to the SCC.

SCCHack begins with a read of the control register. This resets the pointer value to zero so we are in a known condition. It then enters a loop asking for the register number to access, and whether you want to read or write. If it is a read, it returns the value of specified read register in hex format. If it is a write, it asks for the value to write in integer format (0 thru 255). It displays the hex equivalent and writes the value to the specified write register. Then it loops back to the beginning. Be prepared to reset your Mac to get back to normal after playing with this.

HackTerm is a real simple terminal emulator that bypasses the serial driver. The first thing it does is reset the modem port and initialize the write registers. There are ten registers to initialize which are configured for a default condition of 300 baud, 8 data bits, 2 stop bits, and no parity. The order of initialization is important, as well as the values. The initial register values are:

WR9 = $88. Reset channel A and enable all interrupts.

WR1 = $01. Enable external/status (mouse input) interrupts.

WR4 = $4C. Divide input clock by 16, 2 stop bits, no parity.

WR11 = $50. Use baud rate generator output for transmit and receive clocks.

WR12 = $7C. Lower byte of baud rate generator time constant.

WR13 = $01. Upper byte of baud rate generator time constant.

WR14 = $01. Enable baud rate generator.

WR15 = $08. Enable DCD (mouse input) interrupts.

WR3 = $C1. Receive parameters. 8 bits/character, enable receiver.

WR5 = $6A. Transmit parameters. 8 bits/character, enable transmitter,

set RTS output high (enable RS-422 driver).

After initialization, the program checks the keyboard for input. BusyRead returns either a character or a null if there has been nothing typed since the last call to BusyRead. A control C terminates the program and a control B causes a jump to the SetBaud procedure. SetBaud prompts you for a baud rate (300, 1200, . . ), computes the lower and upper bytes of the time constant and writes them to WR12 and WR13.

If there is a keyboard input that is not a cntl-C, cntl-B, or a null, then PutChar is called which sends the character out the modem port. GetChar is called next which checks the input buffer and displays any received characters.

You might want to call the serial driver routine SerReset after exiting this program to restore the chip to it's normal configuration and avoid any side effects later.

Writing this article has convinced me that maybe the serial driver isn't so hard to use after all. But if you can't get the serial driver to do what you want, at least now you have an alternative.


MODULE SCCHack;

(* Written by Jeff Mitchell
 Digital Solutions,  1985
 
This program allows interactive manipulation
of the internal SCC registers.It uses only
channel A but I've included the offsets for
channel B for reference.  *)

FROM  Terminal IMPORTRead,Write,WriteLn,
 WriteString,ClearScreen;
FROM  InOut IMPORT ReadInt,WriteHex; 

 CONST
 (* Offsets into SCC registers *)
 aData  =  6;    (* A channel data *)
 aCtl   =  2;    (* A channel control *)
 bData  =  4;    (* B channel data *)
 bCtl   =  0;    (* B channel control *)
 cntl_B =  2;    (* ASCII value *)
 cntl_C =  3;    (* ASCII value *)
 NULL =  0; (* ASCII value *)
 
 TYPE
 SerPtr = POINTER TO ARRAY [0..6] OF CHAR;
 (* Needed for byte access *)
 
 VAR
 SCCRd [1D8H]: SerPtr;  (* Read pointer *) SCCWr[1DCH]: SerPtr; (* Write 
pointer *)
 ch: CHAR;
 reg: INTEGER;

BEGIN (* SCCHack *)
 ClearScreen;
 ch:= SCCRd^[aCtl];(* Ensure ptr reg = 0 *)
 
 REPEAT
 WriteString('Which register ? ');
 ReadInt(reg);
 WriteLn;
 SCCWr^[aCtl]:= CHR(reg); (* Set pointer *)
 
 REPEAT
 WriteString('Read or Write? ');
 Read(ch);
 Write(ch);
 WriteLn
 UNTIL (CAP(ch) = 'R') OR (CAP(ch) = 'W');
 
 IF (CAP(ch) = 'R') THEN
 ch:= SCCRd^[aCtl];(* Read register *)
 WriteHex(CARDINAL(ch),4); (* Display in hex *)
 WriteLn
 ELSE 
 WriteString('Register Value? ');
 ReadInt(reg);   (* Integer value, not hex *)
 WriteLn;
 WriteString('Hex equivalent = ');
 WriteHex(CARDINAL(reg),4);
 WriteLn;
 SCCWr^[aCtl]:= CHR(reg)  (* Write to register *)
 END;
 
 REPEAT
 WriteString('Try another? ');(* Fun, huh? *)
 Read(ch);
 Write(ch);
 WriteLn
 UNTIL (CAP(ch) = 'Y') OR (CAP(ch) = 'N');
 WriteLn
 UNTIL (CAP(ch) <> 'Y')
 
END SCCHack.

MODULE HackTerm;

(* Written by Jeff Mitchell
 Digital Solutions,  1985
 
This is a simple terminal emulator
which completely bypasses the operating
system for serial I/O.    *)
FROM  Terminal IMPORTBusyRead,Write,WriteLn,
 WriteString,ClearScreen;
FROM  InOut IMPORT ReadInt;
 CONST
 (* Offsets into SCC registers *)
 (* A channel is the modem port *)
 aData  =  6;    (* A channel data *)
 aCtl   =  2;    (* A channel control *)
 (* B channel is the printer port *)
 bData  =  4;    (* B channel data *)
 bCtl   =  0;    (* B channel control *)
 cntl_B =  2;    (* ASCII value *)
 cntl_C =  3;    (* ASCII value *)
 NULL =  0; (* ASCII value *) 
 TYPE
 SerPtr = POINTER TO ARRAY [0..6] OF CHAR;
 (* Needed for byte access *) 
 VAR
 SCCRd [1D8H]: SerPtr;  (* Read pointer *)
 SCCWr  [1DCH]: SerPtr; (* Write pointer *)
 ch,status: CHAR;
 bRate: INTEGER;
 hiByte,loByte: CARDINAL;
 PROCEDUREGetChar (VAR ch: CHAR): BOOLEAN;
 (*   Checks to see if a character has been 
 received and fetches it. *)
 BEGIN
 SCCWr^[aCtl]:= CHR(0);   (* Tx, Rx status *)
 status:= SCCRd^[aCtl];
 IF ODD(ORD(status)) THEN (* Test bit 0 *)
 ch:= SCCRd^[aData]; (* Rx char available *)
 RETURN TRUE
 ELSE 
 RETURN FALSE    (* No char received *)
 END
 END  GetChar;
 
 PROCEDUREPutChar (VAR ch: CHAR);
 (*   Waits until transmit buffer empty then
 outputs a character.*)
 
 BEGIN
 REPEAT (* Wait until xmit buffer empty *)
 SCCWr^[aCtl]:= CHR(0); (* Tx, Rx status *)
 status:= SCCRd^[aCtl]
 UNTIL ODD(ORD(status) DIV 4);   (* Test bit 2 *)
 SCCWr^[aData]:= ch(* transmit char *)
 END PutChar;
 
 PROCEDURE SetBaud;
 (*   Compute the time constant for the baud
 rate generator and split it into high
 and low bytes.  *)BEGIN
 WriteLn;
 WriteString('Desired baud rate? ');
 ReadInt(bRate);
 WriteLn;
 
 (* Compute baud rate generator time constants *)
 hiByte:= (TRUNC(115000.0 /
 FLOAT(CARDINAL(bRate))) - 2) DIV 256;
 loByte:= (TRUNC(115000.0 /
 FLOAT(CARDINAL(bRate))) - 2) MOD 256;
 SCCWr^[aCtl]:= CHR(13);
 SCCWr^[aCtl]:= CHR(hiByte);
 SCCWr^[aCtl]:= CHR(12);
 SCCWr^[aCtl]:= CHR(loByte)
 END SetBaud;

BEGIN (* HackTerm *)
 ClearScreen;
 ch:= SCCRd^[aCtl];(* Ensure ptr reg = 0 *)

 (* Reset channel A, enable all interrupts *)
 SCCWr^[aCtl]:= CHR(9); 
 SCCWr^[aCtl]:= CHR(136); 

 (* Enable external status interrupts *)
 SCCWr^[aCtl]:= CHR(1); 
 SCCWr^[aCtl]:= CHR(1); 

 (* Set Tx, Rx modes *)
 SCCWr^[aCtl]:= CHR(4); 
 SCCWr^[aCtl]:= CHR(76);  

 (* Set clock mode *)
 SCCWr^[aCtl]:= CHR(11);  
 SCCWr^[aCtl]:= CHR(80);  

 (* Set default baud rate to 300 *)
 (* Lower byte *)
 SCCWr^[aCtl]:= CHR(12);  
 SCCWr^[aCtl]:= CHR(124); 

 (* Upper byte *)
 SCCWr^[aCtl]:= CHR(13);  
 SCCWr^[aCtl]:= CHR(1); 

 (* Enable baud rate generator *)
 SCCWr^[aCtl]:= CHR(14);  
 SCCWr^[aCtl]:= CHR(1); 

 (* Enable DCD (mouse) interrupts *)
 SCCWr^[aCtl]:= CHR(15);  
 SCCWr^[aCtl]:= CHR(8); 
 (* Set Rx parameters, enable receiver *)
 SCCWr^[aCtl]:= CHR(3); 
 SCCWr^[aCtl]:= CHR(193); 
 (* Set Tx parameters, enable transmitter *)
 SCCWr^[aCtl]:= CHR(5); 
 SCCWr^[aCtl]:= CHR(106); 
 
 BusyRead(ch);
 IF ORD(ch) <> cntl_C THEN
 REPEAT
 IF ORD(ch) = cntl_B THEN
 SetBaud
 ELSE
 IF ORD(ch) <> NULL THEN
 PutChar(ch)
 END
 END;
 WHILE GetChar(ch) DO
 Write(ch)
 END;   
 BusyRead(ch);
 UNTIL ORD(ch) = cntl_C
 END  
END HackTerm.
 

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Manager *Apple* Systems Administration - Pu...
Req ID 3315BR Position Title Manager, Apple Systems Administration Job Description The Manager of Apple Systems Administration oversees the administration and Read more
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